[Xen-changelog] [xen-unstable] [IA64] more tlb flush when vcpu migration between pcpu.

[Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User awilliam@xxxxxxxxxxx
# Node ID 37c8b562a8f10c1f3b59db07e11def70cc2e9e1a
# Parent  8dc4af3f192c7c1ef3cd6921196997b903d25add
[IA64] more tlb flush when vcpu migration between pcpu.

When vcpu is migrated to another pcpu and then it returns to the first
pcpu, VHPT and mTLB must also be flushed.

Signed-off-by: Isaku Yamahata <yamahata@xxxxxxxxxxxxx>
---
 xen/arch/ia64/xen/domain.c    |   44 ++++++++++++++++++++++++------------------
 xen/include/asm-ia64/domain.h |    3 ++
 2 files changed, 29 insertions(+), 18 deletions(-)

diff -r 8dc4af3f192c -r 37c8b562a8f1 xen/arch/ia64/xen/domain.c
--- a/xen/arch/ia64/xen/domain.c        Wed Jul 05 09:28:32 2006 -0600
+++ b/xen/arch/ia64/xen/domain.c        Wed Jul 05 09:59:40 2006 -0600
@@ -93,25 +93,32 @@ DEFINE_PER_CPU(int *, current_psr_ic_add
 
 static void flush_vtlb_for_context_switch(struct vcpu* vcpu)
 {
-       int last_vcpu_id =
-               vcpu->domain->arch.last_vcpu[smp_processor_id()].vcpu_id;
-
-       if (is_idle_domain(vcpu->domain) || last_vcpu_id == vcpu->vcpu_id)
+       int cpu = smp_processor_id();
+       int last_vcpu_id = vcpu->domain->arch.last_vcpu[cpu].vcpu_id;
+       int last_processor = vcpu->arch.last_processor;
+
+       if (is_idle_domain(vcpu->domain))
                return;
-       vcpu->domain->arch.last_vcpu[smp_processor_id()].vcpu_id =
-               vcpu->vcpu_id;
-       if (last_vcpu_id == INVALID_VCPU_ID) 
-               return;
-
-       // if the vTLB implementation was changed,
-       // the followings must be updated either.
-       if (VMX_DOMAIN(vcpu)) {
-               // currently vTLB for vt-i domian is per vcpu.
-               // so any flushing isn't needed.
-       } else {
-               vhpt_flush();
-       }
-       local_flush_tlb_all();
+       
+       vcpu->domain->arch.last_vcpu[cpu].vcpu_id = vcpu->vcpu_id;
+       vcpu->arch.last_processor = cpu;
+
+       if ((last_vcpu_id != vcpu->vcpu_id &&
+            last_vcpu_id != INVALID_VCPU_ID) ||
+           (last_vcpu_id == vcpu->vcpu_id &&
+            last_processor != cpu &&
+            last_processor != INVALID_PROCESSOR)) {
+
+               // if the vTLB implementation was changed,
+               // the followings must be updated either.
+               if (VMX_DOMAIN(vcpu)) {
+                       // currently vTLB for vt-i domian is per vcpu.
+                       // so any flushing isn't needed.
+               } else {
+                       vhpt_flush();
+               }
+               local_flush_tlb_all();
+       }
 }
 
 void schedule_tail(struct vcpu *prev)
@@ -298,6 +305,7 @@ struct vcpu *alloc_vcpu_struct(struct do
            v->arch.starting_rid = d->arch.starting_rid;
            v->arch.ending_rid = d->arch.ending_rid;
            v->arch.breakimm = d->arch.breakimm;
+           v->arch.last_processor = INVALID_PROCESSOR;
        }
 
        return v;
diff -r 8dc4af3f192c -r 37c8b562a8f1 xen/include/asm-ia64/domain.h
--- a/xen/include/asm-ia64/domain.h     Wed Jul 05 09:28:32 2006 -0600
+++ b/xen/include/asm-ia64/domain.h     Wed Jul 05 09:59:40 2006 -0600
@@ -171,6 +171,9 @@ struct arch_vcpu {
     int mode_flags;
     fpswa_ret_t fpswa_ret;     /* save return values of FPSWA emulation */
     struct arch_vmx_struct arch_vmx; /* Virtual Machine Extensions */
+
+#define INVALID_PROCESSOR       INT_MAX
+    int last_processor;
 };
 
 #include <asm/uaccess.h> /* for KERNEL_DS */

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