# HG changeset patch
# User chris@xxxxxxxxxxxxxxxxxxxxxxxx
# Node ID b4d5a36e380bba81db5478c71b80425f4db38248
# Parent 3e07ec30c44538e7ea55b0da2cb2624036481fc3
[qemu] Initialize vga from within qemu for when the bios doesn't do so.
On xen/x86, vga bios is copied to 0xC0000 by guest firmware.
However on ia64 platform, native firmware depends on some
initialization vga state at power on and so does guest firmware.
That's why that vga bios initialization stub is required for vti
domain, to match platform requirement.
Signed-off-by: Kevin Tian <kevin.tian@xxxxxxxxx>
Signed-off-by: Zhang Xiantao <xiantao.zhang@xxxxxxxxx>
Signed-off-by: Christian Limpach <Christian.Limpach@xxxxxxxxxxxxx>
---
tools/ioemu/hw/vga.c | 130 ++++++++++++++++++++++++++++++++++
tools/ioemu/patches/domain-timeoffset | 8 +-
tools/ioemu/patches/qemu-init-vgabios | 10 ++
tools/ioemu/patches/series | 1
tools/ioemu/patches/shadow-vram | 6 -
tools/ioemu/patches/shared-vram | 20 ++---
6 files changed, 158 insertions(+), 17 deletions(-)
diff -r 3e07ec30c445 -r b4d5a36e380b tools/ioemu/hw/vga.c
--- a/tools/ioemu/hw/vga.c Wed Jul 26 14:52:47 2006 +0100
+++ b/tools/ioemu/hw/vga.c Wed Jul 26 15:20:30 2006 +0100
@@ -1773,6 +1773,136 @@ static void vga_map(PCIDevice *pci_dev,
}
}
+/* do the same job as vgabios before vgabios get ready - yeah */
+void vga_bios_init(VGAState *s)
+{
+ uint8_t palette_model[192] = {
+ 0, 0, 0, 0, 0, 170, 0, 170,
+ 0, 0, 170, 170, 170, 0, 0, 170,
+ 0, 170, 170, 85, 0, 170, 170, 170,
+ 85, 85, 85, 85, 85, 255, 85, 255,
+ 85, 85, 255, 255, 255, 85, 85, 255,
+ 85, 255, 255, 255, 85, 255, 255, 255,
+ 0, 21, 0, 0, 21, 42, 0, 63,
+ 0, 0, 63, 42, 42, 21, 0, 42,
+ 21, 42, 42, 63, 0, 42, 63, 42,
+ 0, 21, 21, 0, 21, 63, 0, 63,
+ 21, 0, 63, 63, 42, 21, 21, 42,
+ 21, 63, 42, 63, 21, 42, 63, 63,
+ 21, 0, 0, 21, 0, 42, 21, 42,
+ 0, 21, 42, 42, 63, 0, 0, 63,
+ 0, 42, 63, 42, 0, 63, 42, 42,
+ 21, 0, 21, 21, 0, 63, 21, 42,
+ 21, 21, 42, 63, 63, 0, 21, 63,
+ 0, 63, 63, 42, 21, 63, 42, 63,
+ 21, 21, 0, 21, 21, 42, 21, 63,
+ 0, 21, 63, 42, 63, 21, 0, 63,
+ 21, 42, 63, 63, 0, 63, 63, 42,
+ 21, 21, 21, 21, 21, 63, 21, 63,
+ 21, 21, 63, 63, 63, 21, 21, 63,
+ 21, 63, 63, 63, 21, 63, 63, 63
+ };
+
+ s->latch = 0;
+
+ s->sr_index = 3;
+ s->sr[0] = 3;
+ s->sr[1] = 0;
+ s->sr[2] = 3;
+ s->sr[3] = 0;
+ s->sr[4] = 2;
+ s->sr[5] = 0;
+ s->sr[6] = 0;
+ s->sr[7] = 0;
+
+ s->gr_index = 5;
+ s->gr[0] = 0;
+ s->gr[1] = 0;
+ s->gr[2] = 0;
+ s->gr[3] = 0;
+ s->gr[4] = 0;
+ s->gr[5] = 16;
+ s->gr[6] = 14;
+ s->gr[7] = 15;
+ s->gr[8] = 255;
+
+ /* changed by out 0x03c0 */
+ s->ar_index = 32;
+ s->ar[0] = 0;
+ s->ar[1] = 1;
+ s->ar[2] = 2;
+ s->ar[3] = 3;
+ s->ar[4] = 4;
+ s->ar[5] = 5;
+ s->ar[6] = 6;
+ s->ar[7] = 7;
+ s->ar[8] = 8;
+ s->ar[9] = 9;
+ s->ar[10] = 10;
+ s->ar[11] = 11;
+ s->ar[12] = 12;
+ s->ar[13] = 13;
+ s->ar[14] = 14;
+ s->ar[15] = 15;
+ s->ar[16] = 12;
+ s->ar[17] = 0;
+ s->ar[18] = 15;
+ s->ar[19] = 8;
+ s->ar[20] = 0;
+
+ s->ar_flip_flop = 1;
+
+ s->cr_index = 15;
+ s->cr[0] = 95;
+ s->cr[1] = 79;
+ s->cr[2] = 80;
+ s->cr[3] = 130;
+ s->cr[4] = 85;
+ s->cr[5] = 129;
+ s->cr[6] = 191;
+ s->cr[7] = 31;
+ s->cr[8] = 0;
+ s->cr[9] = 79;
+ s->cr[10] = 14;
+ s->cr[11] = 15;
+ s->cr[12] = 0;
+ s->cr[13] = 0;
+ s->cr[14] = 5;
+ s->cr[15] = 160;
+ s->cr[16] = 156;
+ s->cr[17] = 142;
+ s->cr[18] = 143;
+ s->cr[19] = 40;
+ s->cr[20] = 31;
+ s->cr[21] = 150;
+ s->cr[22] = 185;
+ s->cr[23] = 163;
+ s->cr[24] = 255;
+
+ s->msr = 103;
+ s->fcr = 0;
+ s->st00 = 0;
+ s->st01 = 0;
+
+ /* dac_* & palette will be initialized by os through out 0x03c8 &
+ * out 0c03c9(1:3) */
+ s->dac_state = 0;
+ s->dac_sub_index = 0;
+ s->dac_read_index = 0;
+ s->dac_write_index = 16;
+ s->dac_cache[0] = 255;
+ s->dac_cache[1] = 255;
+ s->dac_cache[2] = 255;
+
+ /* palette */
+ memcpy(s->palette, palette_model, 192);
+
+ s->bank_offset = 0;
+ s->graphic_mode = -1;
+
+ /* TODO: add vbe support if enabled */
+}
+
/* when used on xen environment, the vga_ram_base is not used */
void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
unsigned long vga_ram_offset, int vga_ram_size)
diff -r 3e07ec30c445 -r b4d5a36e380b tools/ioemu/patches/domain-timeoffset
--- a/tools/ioemu/patches/domain-timeoffset Wed Jul 26 14:52:47 2006 +0100
+++ b/tools/ioemu/patches/domain-timeoffset Wed Jul 26 15:20:30 2006 +0100
@@ -1,7 +1,7 @@ Index: ioemu/hw/mc146818rtc.c
Index: ioemu/hw/mc146818rtc.c
===================================================================
---- ioemu.orig/hw/mc146818rtc.c 2006-07-26 14:33:00.461515790 +0100
-+++ ioemu/hw/mc146818rtc.c 2006-07-26 14:33:07.689716710 +0100
+--- ioemu.orig/hw/mc146818rtc.c 2006-07-26 15:17:35.110819901 +0100
++++ ioemu/hw/mc146818rtc.c 2006-07-26 15:17:40.292255496 +0100
@@ -178,10 +178,27 @@
}
}
@@ -46,8 +46,8 @@ Index: ioemu/hw/mc146818rtc.c
static void rtc_copy_date(RTCState *s)
Index: ioemu/hw/pc.c
===================================================================
---- ioemu.orig/hw/pc.c 2006-07-26 14:33:07.435744787 +0100
-+++ ioemu/hw/pc.c 2006-07-26 14:33:07.690716600 +0100
+--- ioemu.orig/hw/pc.c 2006-07-26 15:17:39.820306906 +0100
++++ ioemu/hw/pc.c 2006-07-26 15:17:40.293255388 +0100
@@ -151,7 +151,7 @@
}
@@ -117,8 +117,8 @@ Index: ioemu/hw/pc.c
QEMUMachine pc_machine = {
Index: ioemu/vl.c
===================================================================
---- ioemu.orig/vl.c 2006-07-26 14:33:07.566730307 +0100
-+++ ioemu/vl.c 2006-07-26 14:33:07.692716379 +0100
+--- ioemu.orig/vl.c 2006-07-26 15:17:40.169268893 +0100
++++ ioemu/vl.c 2006-07-26 15:17:40.296255061 +0100
@@ -164,6 +164,8 @@
int xc_handle;
@@ -174,8 +174,8 @@ Index: ioemu/vl.c
qemu_mod_timer(gui_timer, qemu_get_clock(rt_clock));
Index: ioemu/vl.h
===================================================================
---- ioemu.orig/vl.h 2006-07-26 14:33:07.439744345 +0100
-+++ ioemu/vl.h 2006-07-26 14:33:07.693716268 +0100
+--- ioemu.orig/vl.h 2006-07-26 15:17:39.825306361 +0100
++++ ioemu/vl.h 2006-07-26 15:17:40.297254952 +0100
@@ -556,7 +556,7 @@
int boot_device,
DisplayState *ds, const char **fd_filename, int snapshot,
diff -r 3e07ec30c445 -r b4d5a36e380b tools/ioemu/patches/series
--- a/tools/ioemu/patches/series Wed Jul 26 14:52:47 2006 +0100
+++ b/tools/ioemu/patches/series Wed Jul 26 15:20:30 2006 +0100
@@ -14,6 +14,7 @@ qemu-smp
qemu-smp
qemu-no-apic
qemu-nobios
+qemu-init-vgabios
xen-network
qemu-timer
domain-reset
diff -r 3e07ec30c445 -r b4d5a36e380b tools/ioemu/patches/shadow-vram
--- a/tools/ioemu/patches/shadow-vram Wed Jul 26 14:52:47 2006 +0100
+++ b/tools/ioemu/patches/shadow-vram Wed Jul 26 15:20:30 2006 +0100
@@ -1,7 +1,7 @@ Index: ioemu/hw/vga.c
Index: ioemu/hw/vga.c
===================================================================
---- ioemu.orig/hw/vga.c 2006-07-26 13:20:34.464363234 +0100
-+++ ioemu/hw/vga.c 2006-07-26 13:20:34.660342784 +0100
+--- ioemu.orig/hw/vga.c 2006-07-26 15:17:39.821306797 +0100
++++ ioemu/hw/vga.c 2006-07-26 15:17:40.017285449 +0100
@@ -1287,6 +1287,105 @@
}
}
@@ -120,7 +120,7 @@ Index: ioemu/hw/vga.c
addr1 = (s->start_addr * 4);
bwidth = width * 4;
y_start = -1;
-@@ -1700,6 +1804,14 @@
+@@ -1830,6 +1934,14 @@
vga_reset(s);
@@ -137,8 +137,8 @@ Index: ioemu/hw/vga.c
s->vram_size = vga_ram_size;
Index: ioemu/hw/vga_int.h
===================================================================
---- ioemu.orig/hw/vga_int.h 2006-07-26 13:20:34.464363234 +0100
-+++ ioemu/hw/vga_int.h 2006-07-26 13:20:34.661342680 +0100
+--- ioemu.orig/hw/vga_int.h 2006-07-26 15:17:39.822306688 +0100
++++ ioemu/hw/vga_int.h 2006-07-26 15:17:40.017285449 +0100
@@ -76,6 +76,7 @@
#define VGA_STATE_COMMON \
diff -r 3e07ec30c445 -r b4d5a36e380b tools/ioemu/patches/shared-vram
--- a/tools/ioemu/patches/shared-vram Wed Jul 26 14:52:47 2006 +0100
+++ b/tools/ioemu/patches/shared-vram Wed Jul 26 15:20:30 2006 +0100
@@ -1,7 +1,7 @@ Index: ioemu/hw/cirrus_vga.c
Index: ioemu/hw/cirrus_vga.c
===================================================================
---- ioemu.orig/hw/cirrus_vga.c 2006-07-26 13:18:13.906013141 +0100
-+++ ioemu/hw/cirrus_vga.c 2006-07-26 13:20:34.462363443 +0100
+--- ioemu.orig/hw/cirrus_vga.c 2006-07-26 15:17:35.230806831 +0100
++++ ioemu/hw/cirrus_vga.c 2006-07-26 15:17:39.819307015 +0100
@@ -28,6 +28,9 @@
*/
#include "vl.h"
@@ -176,8 +176,8 @@ Index: ioemu/hw/cirrus_vga.c
}
Index: ioemu/hw/pc.c
===================================================================
---- ioemu.orig/hw/pc.c 2006-07-26 13:20:34.396370329 +0100
-+++ ioemu/hw/pc.c 2006-07-26 13:20:34.463363339 +0100
+--- ioemu.orig/hw/pc.c 2006-07-26 15:17:39.752314312 +0100
++++ ioemu/hw/pc.c 2006-07-26 15:17:39.820306906 +0100
@@ -783,14 +783,14 @@
if (cirrus_vga_enabled) {
if (pci_enabled) {
@@ -198,17 +198,17 @@ Index: ioemu/hw/pc.c
Index: ioemu/hw/vga.c
===================================================================
---- ioemu.orig/hw/vga.c 2006-07-26 13:20:33.293485412 +0100
-+++ ioemu/hw/vga.c 2006-07-26 13:20:34.464363234 +0100
-@@ -1669,6 +1669,7 @@
- }
+--- ioemu.orig/hw/vga.c 2006-07-26 15:17:39.352357879 +0100
++++ ioemu/hw/vga.c 2006-07-26 15:17:39.821306797 +0100
+@@ -1799,6 +1799,7 @@
+ /* TODO: add vbe support if enabled */
}
+/* when used on xen environment, the vga_ram_base is not used */
void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
unsigned long vga_ram_offset, int vga_ram_size)
{
-@@ -1699,7 +1700,7 @@
+@@ -1829,7 +1830,7 @@
vga_reset(s);
@@ -217,7 +217,7 @@ Index: ioemu/hw/vga.c
s->vram_offset = vga_ram_offset;
s->vram_size = vga_ram_size;
s->ds = ds;
-@@ -1811,6 +1812,31 @@
+@@ -1941,6 +1942,31 @@
return 0;
}
@@ -251,8 +251,8 @@ Index: ioemu/hw/vga.c
Index: ioemu/hw/vga_int.h
===================================================================
---- ioemu.orig/hw/vga_int.h 2006-07-26 13:20:33.063509409 +0100
-+++ ioemu/hw/vga_int.h 2006-07-26 13:20:34.464363234 +0100
+--- ioemu.orig/hw/vga_int.h 2006-07-26 15:17:38.201483242 +0100
++++ ioemu/hw/vga_int.h 2006-07-26 15:17:39.822306688 +0100
@@ -166,5 +166,6 @@
unsigned int color0, unsigned int color1,
unsigned int color_xor);
@@ -262,8 +262,8 @@ Index: ioemu/hw/vga_int.h
extern const uint8_t gr_mask[16];
Index: ioemu/vl.c
===================================================================
---- ioemu.orig/vl.c 2006-07-26 13:20:34.398370121 +0100
-+++ ioemu/vl.c 2006-07-26 13:20:34.466363026 +0100
+--- ioemu.orig/vl.c 2006-07-26 15:17:39.755313985 +0100
++++ ioemu/vl.c 2006-07-26 15:17:39.824306470 +0100
@@ -5148,6 +5148,78 @@
#define MAX_NET_CLIENTS 32
@@ -345,8 +345,8 @@ Index: ioemu/vl.c
#ifdef CONFIG_GDBSTUB
Index: ioemu/vl.h
===================================================================
---- ioemu.orig/vl.h 2006-07-26 13:20:34.268383684 +0100
-+++ ioemu/vl.h 2006-07-26 13:20:34.467362921 +0100
+--- ioemu.orig/vl.h 2006-07-26 15:17:39.621328580 +0100
++++ ioemu/vl.h 2006-07-26 15:17:39.825306361 +0100
@@ -136,6 +136,13 @@
void main_loop_wait(int timeout);
diff -r 3e07ec30c445 -r b4d5a36e380b tools/ioemu/patches/qemu-init-vgabios
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/tools/ioemu/patches/qemu-init-vgabios Wed Jul 26 15:20:30 2006 +0100
@@ -0,0 +1,141 @@
+Index: ioemu/hw/vga.c
+===================================================================
+--- ioemu.orig/hw/vga.c 2006-07-26 15:16:41.955609165 +0100
++++ ioemu/hw/vga.c 2006-07-26 15:17:16.910802283 +0100
+@@ -1669,6 +1669,136 @@
+ }
+ }
+
++/* do the same job as vgabios before vgabios get ready - yeah */
++void vga_bios_init(VGAState *s)
++{
++ uint8_t palette_model[192] = {
++ 0, 0, 0, 0, 0, 170, 0, 170,
++ 0, 0, 170, 170, 170, 0, 0, 170,
++ 0, 170, 170, 85, 0, 170, 170, 170,
++ 85, 85, 85, 85, 85, 255, 85, 255,
++ 85, 85, 255, 255, 255, 85, 85, 255,
++ 85, 255, 255, 255, 85, 255, 255, 255,
++ 0, 21, 0, 0, 21, 42, 0, 63,
++ 0, 0, 63, 42, 42, 21, 0, 42,
++ 21, 42, 42, 63, 0, 42, 63, 42,
++ 0, 21, 21, 0, 21, 63, 0, 63,
++ 21, 0, 63, 63, 42, 21, 21, 42,
++ 21, 63, 42, 63, 21, 42, 63, 63,
++ 21, 0, 0, 21, 0, 42, 21, 42,
++ 0, 21, 42, 42, 63, 0, 0, 63,
++ 0, 42, 63, 42, 0, 63, 42, 42,
++ 21, 0, 21, 21, 0, 63, 21, 42,
++ 21, 21, 42, 63, 63, 0, 21, 63,
++ 0, 63, 63, 42, 21, 63, 42, 63,
++ 21, 21, 0, 21, 21, 42, 21, 63,
++ 0, 21, 63, 42, 63, 21, 0, 63,
++ 21, 42, 63, 63, 0, 63, 63, 42,
++ 21, 21, 21, 21, 21, 63, 21, 63,
++ 21, 21, 63, 63, 63, 21, 21, 63,
++ 21, 63, 63, 63, 21, 63, 63, 63
++ };
++
++ s->latch = 0;
++
++ s->sr_index = 3;
++ s->sr[0] = 3;
++ s->sr[1] = 0;
++ s->sr[2] = 3;
++ s->sr[3] = 0;
++ s->sr[4] = 2;
++ s->sr[5] = 0;
++ s->sr[6] = 0;
++ s->sr[7] = 0;
++
++ s->gr_index = 5;
++ s->gr[0] = 0;
++ s->gr[1] = 0;
++ s->gr[2] = 0;
++ s->gr[3] = 0;
++ s->gr[4] = 0;
++ s->gr[5] = 16;
++ s->gr[6] = 14;
++ s->gr[7] = 15;
++ s->gr[8] = 255;
++
++ /* changed by out 0x03c0 */
++ s->ar_index = 32;
++ s->ar[0] = 0;
++ s->ar[1] = 1;
++ s->ar[2] = 2;
++ s->ar[3] = 3;
++ s->ar[4] = 4;
++ s->ar[5] = 5;
++ s->ar[6] = 6;
++ s->ar[7] = 7;
++ s->ar[8] = 8;
++ s->ar[9] = 9;
++ s->ar[10] = 10;
++ s->ar[11] = 11;
++ s->ar[12] = 12;
++ s->ar[13] = 13;
++ s->ar[14] = 14;
++ s->ar[15] = 15;
++ s->ar[16] = 12;
++ s->ar[17] = 0;
++ s->ar[18] = 15;
++ s->ar[19] = 8;
++ s->ar[20] = 0;
++
++ s->ar_flip_flop = 1;
++
++ s->cr_index = 15;
++ s->cr[0] = 95;
++ s->cr[1] = 79;
++ s->cr[2] = 80;
++ s->cr[3] = 130;
++ s->cr[4] = 85;
++ s->cr[5] = 129;
++ s->cr[6] = 191;
++ s->cr[7] = 31;
++ s->cr[8] = 0;
++ s->cr[9] = 79;
++ s->cr[10] = 14;
++ s->cr[11] = 15;
++ s->cr[12] = 0;
++ s->cr[13] = 0;
++ s->cr[14] = 5;
++ s->cr[15] = 160;
++ s->cr[16] = 156;
++ s->cr[17] = 142;
++ s->cr[18] = 143;
++ s->cr[19] = 40;
++ s->cr[20] = 31;
++ s->cr[21] = 150;
++ s->cr[22] = 185;
++ s->cr[23] = 163;
++ s->cr[24] = 255;
++
++ s->msr = 103;
++ s->fcr = 0;
++ s->st00 = 0;
++ s->st01 = 0;
++
++ /* dac_* & palette will be initialized by os through out 0x03c8 &
++ * out 0c03c9(1:3) */
++ s->dac_state = 0;
++ s->dac_sub_index = 0;
++ s->dac_read_index = 0;
++ s->dac_write_index = 16;
++ s->dac_cache[0] = 255;
++ s->dac_cache[1] = 255;
++ s->dac_cache[2] = 255;
++
++ /* palette */
++ memcpy(s->palette, palette_model, 192);
++
++ s->bank_offset = 0;
++ s->graphic_mode = -1;
++
++ /* TODO: add vbe support if enabled */
++}
++
+ void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
+ unsigned long vga_ram_offset, int vga_ram_size)
+ {
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