[Xen-changelog] Adapt to removal of #ifdef ia64 in xmalloc (handle SMP_CACHE_SHIFT)

[Xen patchbot -unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User djm@xxxxxxxxxxxxxxx
# Node ID 0ee00faf332d4f9eb828ab1ca7b846787d77b2ca
# Parent  3eaab414bdfdb850c6d2e1451410cce82b89a9f9
Adapt to removal of #ifdef ia64 in xmalloc (handle SMP_CACHE_SHIFT)

diff -r 3eaab414bdfd -r 0ee00faf332d xen/include/asm-ia64/linux-xen/asm/cache.h
--- /dev/null   Wed Nov 23 20:43:05 2005
+++ b/xen/include/asm-ia64/linux-xen/asm/cache.h        Wed Nov 23 21:23:28 2005
@@ -0,0 +1,35 @@
+#ifndef _ASM_IA64_CACHE_H
+#define _ASM_IA64_CACHE_H
+
+#include <linux/config.h>
+
+/*
+ * Copyright (C) 1998-2000 Hewlett-Packard Co
+ *     David Mosberger-Tang <davidm@xxxxxxxxxx>
+ */
+
+/* Bytes per L1 (data) cache line.  */
+#define L1_CACHE_SHIFT         CONFIG_IA64_L1_CACHE_SHIFT
+#define L1_CACHE_BYTES         (1 << L1_CACHE_SHIFT)
+
+#define L1_CACHE_SHIFT_MAX 7   /* largest L1 which this arch supports */
+
+#ifdef XEN
+# define SMP_CACHE_SHIFT       L1_CACHE_SHIFT
+# define SMP_CACHE_BYTES       L1_CACHE_BYTES
+#else
+#ifdef CONFIG_SMP
+# define SMP_CACHE_SHIFT       L1_CACHE_SHIFT
+# define SMP_CACHE_BYTES       L1_CACHE_BYTES
+#else
+  /*
+   * The "aligned" directive can only _increase_ alignment, so this is
+   * safe and provides an easy way to avoid wasting space on a
+   * uni-processor:
+   */
+# define SMP_CACHE_SHIFT       3
+# define SMP_CACHE_BYTES       (1 << 3)
+#endif
+#endif
+
+#endif /* _ASM_IA64_CACHE_H */
diff -r 3eaab414bdfd -r 0ee00faf332d xen/include/asm-ia64/linux/asm/cache.h
--- a/xen/include/asm-ia64/linux/asm/cache.h    Wed Nov 23 20:43:05 2005
+++ /dev/null   Wed Nov 23 21:23:28 2005
@@ -1,30 +0,0 @@
-#ifndef _ASM_IA64_CACHE_H
-#define _ASM_IA64_CACHE_H
-
-#include <linux/config.h>
-
-/*
- * Copyright (C) 1998-2000 Hewlett-Packard Co
- *     David Mosberger-Tang <davidm@xxxxxxxxxx>
- */
-
-/* Bytes per L1 (data) cache line.  */
-#define L1_CACHE_SHIFT         CONFIG_IA64_L1_CACHE_SHIFT
-#define L1_CACHE_BYTES         (1 << L1_CACHE_SHIFT)
-
-#define L1_CACHE_SHIFT_MAX 7   /* largest L1 which this arch supports */
-
-#ifdef CONFIG_SMP
-# define SMP_CACHE_SHIFT       L1_CACHE_SHIFT
-# define SMP_CACHE_BYTES       L1_CACHE_BYTES
-#else
-  /*
-   * The "aligned" directive can only _increase_ alignment, so this is
-   * safe and provides an easy way to avoid wasting space on a
-   * uni-processor:
-   */
-# define SMP_CACHE_SHIFT       3
-# define SMP_CACHE_BYTES       (1 << 3)
-#endif
-
-#endif /* _ASM_IA64_CACHE_H */

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