# HG changeset patch
# User ydong@xxxxxxxxxxxxxxxxxxxxx
# Node ID fd61ce502c71261e84818b373c9c39dd1c84dbc3
# Parent 90c6abbd4a59fd90718f3b798c0ce75ba4d7445c
Removing KR to PER CPU memory.
signed-off-by Eddie(Eddie.dong@xxxxxxxxx)
diff -r 90c6abbd4a59 -r fd61ce502c71 xen/arch/ia64/asm-offsets.c
--- a/xen/arch/ia64/asm-offsets.c Fri Aug 12 03:16:25 2005
+++ b/xen/arch/ia64/asm-offsets.c Mon Aug 15 06:52:20 2005
@@ -296,4 +296,11 @@
//DEFINE(IA64_TIME_SOURCE_MMIO64, TIME_SOURCE_MMIO64);
//DEFINE(IA64_TIME_SOURCE_MMIO32, TIME_SOURCE_MMIO32);
//DEFINE(IA64_TIMESPEC_TV_NSEC_OFFSET, offsetof (struct timespec,
tv_nsec));
+ DEFINE(IA64_KR_CURRENT_OFFSET, offsetof (cpu_kr_ia64_t,
_kr[IA64_KR_CURRENT]));
+ DEFINE(IA64_KR_PT_BASE_OFFSET, offsetof (cpu_kr_ia64_t,
_kr[IA64_KR_PT_BASE]));
+ DEFINE(IA64_KR_IO_BASE_OFFSET, offsetof (cpu_kr_ia64_t,
_kr[IA64_KR_IO_BASE]));
+ DEFINE(IA64_KR_PERCPU_DATA_OFFSET, offsetof (cpu_kr_ia64_t,
_kr[IA64_KR_PER_CPU_DATA]));
+ DEFINE(IA64_KR_IO_BASE_OFFSET, offsetof (cpu_kr_ia64_t,
_kr[IA64_KR_IO_BASE]));
+ DEFINE(IA64_KR_CURRENT_STACK_OFFSET, offsetof (cpu_kr_ia64_t,
_kr[IA64_KR_CURRENT_STACK]));
+
}
diff -r 90c6abbd4a59 -r fd61ce502c71 xen/arch/ia64/hyperprivop.S
--- a/xen/arch/ia64/hyperprivop.S Fri Aug 12 03:16:25 2005
+++ b/xen/arch/ia64/hyperprivop.S Mon Aug 15 06:52:20 2005
@@ -73,7 +73,8 @@
ld4 r20=[r20] ;;
cmp.eq p7,p0=r0,r20
(p7) br.cond.sptk.many 1f
- mov r20=IA64_KR(CURRENT);;
+ movl r20=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
+ ld8 r20=[r20];;
adds r21=IA64_VCPU_IRR0_OFFSET,r20;
adds r22=IA64_VCPU_IRR0_OFFSET+8,r20;;
ld8 r23=[r21],16; ld8 r24=[r22],16;;
@@ -257,7 +258,8 @@
st8 [r21]=r20 ;;
// leave cr.ifs alone for later rfi
// set iip to go to domain IVA break instruction vector
- mov r22=IA64_KR(CURRENT);;
+ movl r22=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
+ ld8 r22=[r22];;
adds r22=IA64_VCPU_IVA_OFFSET,r22;;
ld8 r23=[r22];;
movl r24=0x3000;;
@@ -340,7 +342,8 @@
(p6) br.cond.spnt.few fast_tick_reflect_done;;
extr.u r27=r20,0,6 // r27 has low 6 bits of itv.vector
extr.u r26=r20,6,2;; // r26 has irr index of itv.vector
- mov r19=IA64_KR(CURRENT);;
+ movl r19=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
+ ld8 r19=[r19];;
adds r22=IA64_VCPU_DOMAIN_ITM_LAST_OFFSET,r19
adds r23=IA64_VCPU_DOMAIN_ITM_OFFSET,r19;;
ld8 r24=[r22];;
@@ -581,7 +584,8 @@
st8 [r18]=r0;;
// FIXME: need to save iipa and isr to be arch-compliant
// set iip to go to domain IVA break instruction vector
- mov r22=IA64_KR(CURRENT);;
+ movl r22=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
+ ld8 r22=[r22];;
adds r22=IA64_VCPU_IVA_OFFSET,r22;;
ld8 r23=[r22];;
add r20=r20,r23;;
@@ -803,7 +807,8 @@
// r18=&vpsr.i|vpsr.ic, r21==vpsr, r22=vcr.iip
// make sure none of these get trashed in case going to just_do_rfi
- mov r30=IA64_KR(CURRENT);;
+ movl r30=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
+ ld8 r30=[r30];;
adds r24=IA64_VCPU_INSVC3_OFFSET,r30;;
mov r25=192
adds r16=IA64_VCPU_IRR3_OFFSET,r30;;
@@ -1010,7 +1015,8 @@
ld4 r21=[r20];;
cmp.eq p7,p0=r21,r0 // meta==0?
(p7) br.spnt.many 1f ;; // already in virtual mode
- mov r22=IA64_KR(CURRENT);;
+ movl r22=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
+ ld8 r22=[r22];;
adds r22=IA64_VCPU_META_SAVED_RR0_OFFSET,r22;;
ld4 r23=[r22];;
mov rr[r0]=r23;;
@@ -1045,7 +1051,8 @@
ld4 r21=[r20];;
cmp.ne p7,p0=r21,r0 // meta==0?
(p7) br.spnt.many 1f ;; // already in metaphysical mode
- mov r22=IA64_KR(CURRENT);;
+ movl r22=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
+ ld8 r22=[r22];;
adds r22=IA64_VCPU_META_RR0_OFFSET,r22;;
ld4 r23=[r22];;
mov rr[r0]=r23;;
@@ -1137,7 +1144,8 @@
(p7) adds r20=XSI_PEND_OFS-XSI_PSR_IC_OFS,r18 ;;
(p7) st4 [r20]=r0;;
(p7) br.spnt.many 1f ;;
- mov r30=IA64_KR(CURRENT);;
+ movl r30=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
+ ld8 r30=[r30];;
adds r24=IA64_VCPU_INSVC3_OFFSET,r30;;
mov r25=192
adds r22=IA64_VCPU_IRR3_OFFSET,r30;;
@@ -1242,7 +1250,8 @@
adds r21=1,r21;;
st8 [r20]=r21;;
#endif
- mov r22=IA64_KR(CURRENT);;
+ movl r22=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
+ ld8 r22=[r22];;
adds r22=IA64_VCPU_INSVC3_OFFSET,r22;;
ld8 r23=[r22];;
cmp.eq p6,p0=r23,r0;;
@@ -1307,7 +1316,8 @@
#endif
movl r20=THIS_CPU(cpu_info)+IA64_CPUINFO_ITM_NEXT_OFFSET;;
ld8 r21=[r20];;
- mov r20=IA64_KR(CURRENT);;
+ movl r20=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
+ ld8 r20=[r20];;
adds r20=IA64_VCPU_DOMAIN_ITM_OFFSET,r20;;
st8 [r20]=r8;;
cmp.geu p6,p0=r21,r8;;
@@ -1378,7 +1388,8 @@
st8 [r20]=r21;;
#endif
extr.u r26=r9,8,24 // r26 = r9.rid
- mov r20=IA64_KR(CURRENT);;
+ movl r20=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
+ ld8 r20=[r20];;
adds r21=IA64_VCPU_STARTING_RID_OFFSET,r20;;
ld4 r22=[r21];;
adds r21=IA64_VCPU_ENDING_RID_OFFSET,r20;;
@@ -1544,7 +1555,8 @@
mov ar.lc=r30 ;;
mov r29=cr.ipsr
mov r30=cr.iip;;
- mov r27=IA64_KR(CURRENT);;
+ movl r27=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
+ ld8 r27=[r27];;
adds r25=IA64_VCPU_DTLB_OFFSET,r27
adds r26=IA64_VCPU_ITLB_OFFSET,r27;;
ld8 r24=[r25]
diff -r 90c6abbd4a59 -r fd61ce502c71 xen/arch/ia64/ivt.S
--- a/xen/arch/ia64/ivt.S Fri Aug 12 03:16:25 2005
+++ b/xen/arch/ia64/ivt.S Mon Aug 15 06:52:20 2005
@@ -833,7 +833,9 @@
cmp4.eq p7,p0=r0,r19
(p7) br.sptk.many fast_hyperprivop
;;
- mov r22=IA64_KR(CURRENT);;
+ movl r22=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
+ ld8 r22 = [r22]
+ ;;
adds r22=IA64_VCPU_BREAKIMM_OFFSET,r22;;
ld4 r23=[r22];;
cmp4.eq p6,p7=r23,r17 // Xen-reserved breakimm?
@@ -842,7 +844,8 @@
br.sptk.many fast_break_reflect
;;
#endif
- mov r16=IA64_KR(CURRENT) // r16 = current task; 12 cycle
read lat.
+ movl r16=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
+ ld8 r16=[r16]
mov r17=cr.iim
mov r18=__IA64_BREAK_SYSCALL
mov r21=ar.fpsr
diff -r 90c6abbd4a59 -r fd61ce502c71 xen/arch/ia64/linux-xen/entry.S
--- a/xen/arch/ia64/linux-xen/entry.S Fri Aug 12 03:16:25 2005
+++ b/xen/arch/ia64/linux-xen/entry.S Mon Aug 15 06:52:20 2005
@@ -191,7 +191,8 @@
adds r22=IA64_TASK_THREAD_KSP_OFFSET,r13
movl r25=init_task
- mov r27=IA64_KR(CURRENT_STACK)
+ movl r27=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_STACK_OFFSET;;
+ ld8 r27=[r27]
adds r21=IA64_TASK_THREAD_KSP_OFFSET,in0
#ifdef XEN
dep r20=0,in0,60,4 // physical address of "next"
@@ -214,7 +215,8 @@
;;
(p6) srlz.d
ld8 sp=[r21] // load kernel stack pointer of new task
- mov IA64_KR(CURRENT)=in0 // update "current" application register
+ movl r8=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
+ st8 [r8]=in0
mov r8=r13 // return pointer to previously running
task
mov r13=in0 // set "current" pointer
;;
@@ -233,7 +235,8 @@
;;
cmp.eq p7,p0=r25,r23
;;
-(p7) mov IA64_KR(CURRENT_STACK)=r26 // remember last page we mapped...
+(p7) movl r8=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_STACK_OFFSET;;
+(p7) st8 [r8]=r26
(p7) br.cond.sptk .done
#endif
rsm psr.ic // interrupts (psr.i) are already
disabled here
@@ -247,8 +250,8 @@
mov cr.ifa=in0 // VA of next task...
;;
mov r25=IA64_TR_CURRENT_STACK
- mov IA64_KR(CURRENT_STACK)=r26 // remember last page we mapped...
- ;;
+ movl r8=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_STACK_OFFSET;;
+ st8 [r8]=r26
itr.d dtr[r25]=r23 // wire in new mapping...
br.cond.sptk .done
END(ia64_switch_to)
@@ -947,7 +950,8 @@
ldf.fill f11=[r2]
bsw.0 // switch back to bank 0 (no stop bit required
beforehand...)
;;
-(pUStk) mov r18=IA64_KR(CURRENT)// M2 (12 cycle read latency)
+(pUStk) movl r18=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
+(pUStk) ld8 r18=[r18]
adds r16=PT(CR_IPSR)+16,r12
adds r17=PT(CR_IIP)+16,r12
diff -r 90c6abbd4a59 -r fd61ce502c71 xen/arch/ia64/linux-xen/head.S
--- a/xen/arch/ia64/linux-xen/head.S Fri Aug 12 03:16:25 2005
+++ b/xen/arch/ia64/linux-xen/head.S Mon Aug 15 06:52:20 2005
@@ -226,8 +226,6 @@
bsw.1
;;
#else // CONFIG_VTI
- mov IA64_KR(CURRENT)=r2 // virtual address
- mov IA64_KR(CURRENT_STACK)=r16
#endif // CONFIG_VTI
mov r13=r2
/*
diff -r 90c6abbd4a59 -r fd61ce502c71 xen/arch/ia64/linux-xen/setup.c
--- a/xen/arch/ia64/linux-xen/setup.c Fri Aug 12 03:16:25 2005
+++ b/xen/arch/ia64/linux-xen/setup.c Mon Aug 15 06:52:20 2005
@@ -66,6 +66,7 @@
#endif
DEFINE_PER_CPU(struct cpuinfo_ia64, cpu_info);
+DEFINE_PER_CPU(cpu_kr_ia64_t, cpu_kr);
DEFINE_PER_CPU(unsigned long, local_per_cpu_offset);
DEFINE_PER_CPU(unsigned long, ia64_phys_stacked_size_p8);
unsigned long ia64_cycles_per_usec;
@@ -261,9 +262,9 @@
phys_iobase = efi_get_iobase();
if (phys_iobase)
/* set AR.KR0 since this is all we use it for anyway */
- ia64_set_kr(IA64_KR_IO_BASE, phys_iobase);
+ __get_cpu_var(cpu_kr)._kr[IA64_KR_IO_BASE]=phys_iobase;
else {
- phys_iobase = ia64_get_kr(IA64_KR_IO_BASE);
+ phys_iobase=__get_cpu_var(cpu_kr)._kr[IA64_KR_IO_BASE];
printk(KERN_INFO "No I/O port range found in EFI memory map,
falling back "
"to AR.KR0\n");
printk(KERN_INFO "I/O port base = 0x%lx\n", phys_iobase);
@@ -610,6 +611,8 @@
setup_per_cpu_areas (void)
{
/* start_kernel() requires this... */
+ __get_cpu_var(cpu_kr)._kr[IA64_KR_CURRENT] = current;
+ __get_cpu_var(cpu_kr)._kr[IA64_KR_CURRENT_STACK] = -1;
}
static void
@@ -667,8 +670,8 @@
* physical addresses of per cpu variables with a simple:
* phys = ar.k3 + &per_cpu_var
*/
- ia64_set_kr(IA64_KR_PER_CPU_DATA,
- ia64_tpa(cpu_data) - (long) __per_cpu_start);
+// ia64_set_kr(IA64_KR_PER_CPU_DATA,
+// ia64_tpa(cpu_data) - (long) __per_cpu_start);
get_max_cacheline_size();
@@ -698,7 +701,7 @@
/* Clear the stack memory reserved for pt_regs: */
memset(ia64_task_regs(current), 0, sizeof(struct pt_regs));
- ia64_set_kr(IA64_KR_FPU_OWNER, 0);
+ __get_cpu_var(cpu_kr)._kr[IA64_KR_FPU_OWNER] = 0;
/*
* Initialize default control register to defer all speculative faults.
The
diff -r 90c6abbd4a59 -r fd61ce502c71 xen/arch/ia64/linux/minstate.h
--- a/xen/arch/ia64/linux/minstate.h Fri Aug 12 03:16:25 2005
+++ b/xen/arch/ia64/linux/minstate.h Mon Aug 15 06:52:20 2005
@@ -61,7 +61,9 @@
;;
#ifdef MINSTATE_VIRT
-# define MINSTATE_GET_CURRENT(reg) mov reg=IA64_KR(CURRENT)
+# define MINSTATE_GET_CURRENT(reg) \
+ movl reg=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;\
+ ld8 reg=[reg]
# define MINSTATE_START_SAVE_MIN MINSTATE_START_SAVE_MIN_VIRT
# define MINSTATE_END_SAVE_MIN MINSTATE_END_SAVE_MIN_VIRT
#endif
@@ -170,7 +172,8 @@
;;
\
.mem.offset 0,0; st8.spill [r16]=r13,16;
\
.mem.offset 8,0; st8.spill [r17]=r21,16; /* save ar.fpsr */
\
- mov r13=IA64_KR(CURRENT); /* establish `current' */
\
+ movl r13=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
\
+ ld8 r13=[r13]; /* establish 'current' */
\
;;
\
.mem.offset 0,0; st8.spill [r16]=r15,16;
\
.mem.offset 8,0; st8.spill [r17]=r14,16;
\
diff -r 90c6abbd4a59 -r fd61ce502c71 xen/arch/ia64/xenmisc.c
--- a/xen/arch/ia64/xenmisc.c Fri Aug 12 03:16:25 2005
+++ b/xen/arch/ia64/xenmisc.c Mon Aug 15 06:52:20 2005
@@ -347,7 +347,8 @@
loop:
printf("$$$$$ PANIC in domain %d (k6=%p): ",
- v->domain->domain_id, ia64_get_kr(IA64_KR_CURRENT));
+ v->domain->domain_id,
+ __get_cpu_var(cpu_kr)._kr[IA64_KR_CURRENT]);
va_start(args, fmt);
(void)vsnprintf(buf, sizeof(buf), fmt, args);
va_end(args);
diff -r 90c6abbd4a59 -r fd61ce502c71
xen/include/asm-ia64/linux-xen/asm/processor.h
--- a/xen/include/asm-ia64/linux-xen/asm/processor.h Fri Aug 12 03:16:25 2005
+++ b/xen/include/asm-ia64/linux-xen/asm/processor.h Mon Aug 15 06:52:20 2005
@@ -183,6 +183,22 @@
DECLARE_PER_CPU(struct cpuinfo_ia64, cpu_info);
+typedef union {
+ struct {
+ __u64 kr0;
+ __u64 kr1;
+ __u64 kr2;
+ __u64 kr3;
+ __u64 kr4;
+ __u64 kr5;
+ __u64 kr6;
+ __u64 kr7;
+ };
+ __u64 _kr[8];
+} cpu_kr_ia64_t;
+
+DECLARE_PER_CPU(cpu_kr_ia64_t, cpu_kr);
+
/*
* The "local" data variable. It refers to the per-CPU data of the currently
executing
* CPU, much like "current" points to the per-task data of the currently
executing task.
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