ChangeSet 1.1668.1.1, 2005/06/06 11:13:19-06:00, djm@xxxxxxxxxxxxxxx
More hyperprivop stuff
Signed-off by : Dan Magenheimer <dan.magenheimer@xxxxxx>
arch/ia64/asm-offsets.c | 11 +++++++++++
arch/ia64/domain.c | 9 ++++++---
arch/ia64/privop.c | 34 +++++++++++++++++++++++++---------
arch/ia64/process.c | 41 ++++++++++++++++++++++++++++++++++++++++-
arch/ia64/regionreg.c | 21 +++++++++++++--------
include/asm-ia64/domain.h | 7 ++++---
include/public/arch-ia64.h | 5 +++--
7 files changed, 102 insertions(+), 26 deletions(-)
diff -Nru a/xen/arch/ia64/asm-offsets.c b/xen/arch/ia64/asm-offsets.c
--- a/xen/arch/ia64/asm-offsets.c 2005-06-10 14:03:41 -04:00
+++ b/xen/arch/ia64/asm-offsets.c 2005-06-10 14:03:41 -04:00
@@ -46,12 +46,18 @@
DEFINE(XSI_PSR_IC, (SHAREDINFO_ADDR+offsetof(vcpu_info_t,
arch.interrupt_collection_enabled)));
DEFINE(XSI_PSR_I_OFS, offsetof(vcpu_info_t,
arch.interrupt_delivery_enabled));
DEFINE(XSI_IIP_OFS, offsetof(vcpu_info_t, arch.iip));
+ DEFINE(XSI_IPSR, (SHAREDINFO_ADDR+offsetof(vcpu_info_t, arch.ipsr)));
DEFINE(XSI_IPSR_OFS, offsetof(vcpu_info_t, arch.ipsr));
DEFINE(XSI_IFS_OFS, offsetof(vcpu_info_t, arch.ifs));
+ DEFINE(XSI_IIM_OFS, offsetof(vcpu_info_t, arch.iim));
DEFINE(XSI_BANKNUM_OFS, offsetof(vcpu_info_t, arch.banknum));
+ DEFINE(XSI_BANK0_OFS, offsetof(vcpu_info_t, arch.bank0_regs[0]));
+ DEFINE(XSI_BANK1_OFS, offsetof(vcpu_info_t, arch.bank1_regs[0]));
DEFINE(XSI_METAPHYS_OFS, offsetof(vcpu_info_t, arch.metaphysical_mode));
+ DEFINE(XSI_PRECOVER_IFS_OFS, offsetof(vcpu_info_t, arch.precover_ifs));
DEFINE(XSI_INCOMPL_REG_OFS, offsetof(vcpu_info_t,
arch.incomplete_regframe));
DEFINE(XSI_PEND_OFS, offsetof(vcpu_info_t, arch.pending_interruption));
+ DEFINE(XSI_RR0_OFS, offsetof(vcpu_info_t, arch.rrs[0]));
//DEFINE(IA64_TASK_BLOCKED_OFFSET,offsetof (struct task_struct,
blocked));
//DEFINE(IA64_TASK_CLEAR_CHILD_TID_OFFSET,offsetof (struct task_struct,
clear_child_tid));
//DEFINE(IA64_TASK_GROUP_LEADER_OFFSET, offsetof (struct task_struct,
group_leader));
@@ -63,6 +69,11 @@
//DEFINE(IA64_TASK_TGID_OFFSET, offsetof (struct task_struct, tgid));
DEFINE(IA64_TASK_THREAD_KSP_OFFSET, offsetof (struct vcpu,
arch._thread.ksp));
DEFINE(IA64_TASK_THREAD_ON_USTACK_OFFSET, offsetof (struct vcpu,
arch._thread.on_ustack));
+
+ DEFINE(IA64_VCPU_META_RR0_OFFSET, offsetof (struct vcpu,
arch.metaphysical_rr0));
+ DEFINE(IA64_VCPU_META_SAVED_RR0_OFFSET, offsetof (struct vcpu,
arch.metaphysical_saved_rr0));
+ DEFINE(IA64_VCPU_BREAKIMM_OFFSET, offsetof (struct vcpu,
arch.breakimm));
+ DEFINE(IA64_VCPU_IVA_OFFSET, offsetof (struct vcpu, arch.iva));
BLANK();
diff -Nru a/xen/arch/ia64/domain.c b/xen/arch/ia64/domain.c
--- a/xen/arch/ia64/domain.c 2005-06-10 14:03:41 -04:00
+++ b/xen/arch/ia64/domain.c 2005-06-10 14:03:41 -04:00
@@ -210,7 +210,7 @@
*/
d->xen_vastart = 0xf000000000000000;
d->xen_vaend = 0xf300000000000000;
- d->breakimm = 0x1000;
+ d->arch.breakimm = 0x1000;
// stay on kernel stack because may get interrupts!
// ia64_ret_from_clone (which b0 gets in new_thread) switches
@@ -244,9 +244,11 @@
}
#endif
d->max_pages = (128*1024*1024)/PAGE_SIZE; // 128MB default // FIXME
- if ((d->metaphysical_rid = allocate_metaphysical_rid()) == -1UL)
+ if ((d->arch.metaphysical_rr0 = allocate_metaphysical_rr0()) == -1UL)
BUG();
v->vcpu_info->arch.metaphysical_mode = 1;
+ v->arch.metaphysical_rr0 = d->arch.metaphysical_rr0;
+ v->arch.metaphysical_saved_rr0 = d->arch.metaphysical_rr0;
#define DOMAIN_RID_BITS_DEFAULT 18
if (!allocate_rid_range(d,DOMAIN_RID_BITS_DEFAULT)) // FIXME
BUG();
@@ -254,7 +256,8 @@
d->xen_vastart = 0xf000000000000000;
d->xen_vaend = 0xf300000000000000;
d->shared_info_va = 0xf100000000000000;
- d->breakimm = 0x1000;
+ d->arch.breakimm = 0x1000;
+ ed->arch.breakimm = d->arch.breakimm;
// stay on kernel stack because may get interrupts!
// ia64_ret_from_clone (which b0 gets in new_thread) switches
// to user stack
diff -Nru a/xen/arch/ia64/privop.c b/xen/arch/ia64/privop.c
--- a/xen/arch/ia64/privop.c 2005-06-10 14:03:41 -04:00
+++ b/xen/arch/ia64/privop.c 2005-06-10 14:03:42 -04:00
@@ -747,14 +747,16 @@
#define HYPERPRIVOP_COVER 0x4
#define HYPERPRIVOP_ITC_D 0x5
#define HYPERPRIVOP_ITC_I 0x6
-#define HYPERPRIVOP_MAX 0x6
+#define HYPERPRIVOP_SSM_I 0x7
+#define HYPERPRIVOP_MAX 0x7
char *hyperpriv_str[HYPERPRIVOP_MAX+1] = {
- 0, "rfi", "rsm.dt", "ssm.dt", "cover", "itc.d", "itc.i",
+ 0, "rfi", "rsm.dt", "ssm.dt", "cover", "itc.d", "itc.i", "ssm.i",
0
};
-unsigned long hyperpriv_cnt[HYPERPRIVOP_MAX+1] = { 0 };
+unsigned long slow_hyperpriv_cnt[HYPERPRIVOP_MAX+1] = { 0 };
+unsigned long fast_hyperpriv_cnt[HYPERPRIVOP_MAX+1] = { 0 };
/* hyperprivops are generally executed in assembly (with physical psr.ic off)
* so this code is primarily used for debugging them */
@@ -765,13 +767,12 @@
INST64 inst;
UINT64 val;
-// FIXME: Add instrumentation for these
// FIXME: Handle faults appropriately for these
if (!iim || iim > HYPERPRIVOP_MAX) {
printf("bad hyperprivop; ignored\n");
return 1;
}
- hyperpriv_cnt[iim]++;
+ slow_hyperpriv_cnt[iim]++;
switch(iim) {
case HYPERPRIVOP_RFI:
(void)vcpu_rfi(v);
@@ -793,6 +794,9 @@
inst.inst = 0;
(void)priv_itc_i(v,inst);
return 1;
+ case HYPERPRIVOP_SSM_I:
+ (void)vcpu_set_psr_i(ed);
+ return 1;
}
return 0;
}
@@ -981,18 +985,28 @@
{
int i;
char *s = buf;
- s += sprintf(s,"Slow hyperprivops:\n");
+ unsigned long total = 0;
+ for (i = 1; i <= HYPERPRIVOP_MAX; i++) total += slow_hyperpriv_cnt[i];
+ s += sprintf(s,"Slow hyperprivops (total %d):\n",total);
+ for (i = 1; i <= HYPERPRIVOP_MAX; i++)
+ if (slow_hyperpriv_cnt[i])
+ s += sprintf(s,"%10d %s\n",
+ slow_hyperpriv_cnt[i], hyperpriv_str[i]);
+ total = 0;
+ for (i = 1; i <= HYPERPRIVOP_MAX; i++) total += fast_hyperpriv_cnt[i];
+ s += sprintf(s,"Fast hyperprivops (total %d):\n",total);
for (i = 1; i <= HYPERPRIVOP_MAX; i++)
- if (hyperpriv_cnt[i])
+ if (fast_hyperpriv_cnt[i])
s += sprintf(s,"%10d %s\n",
- hyperpriv_cnt[i], hyperpriv_str[i]);
+ fast_hyperpriv_cnt[i], hyperpriv_str[i]);
return s - buf;
}
void zero_hyperprivop_counts(void)
{
int i;
- for (i = 0; i <= HYPERPRIVOP_MAX; i++) hyperpriv_cnt[i] = 0;
+ for (i = 0; i <= HYPERPRIVOP_MAX; i++) slow_hyperpriv_cnt[i] = 0;
+ for (i = 0; i <= HYPERPRIVOP_MAX; i++) fast_hyperpriv_cnt[i] = 0;
}
#define TMPBUFLEN 8*1024
@@ -1002,6 +1016,7 @@
int n = dump_privop_counts(buf);
n += dump_hyperprivop_counts(buf + n);
+ n += dump_reflect_counts(buf + n);
#ifdef PRIVOP_ADDR_COUNT
n += dump_privop_addrs(buf + n);
#endif
@@ -1019,6 +1034,7 @@
#ifdef PRIVOP_ADDR_COUNT
zero_privop_addrs();
#endif
+ zero_reflect_counts();
if (len < TMPBUFLEN) return -1;
if (__copy_to_user(ubuf,buf,n)) return -1;
return n;
diff -Nru a/xen/arch/ia64/process.c b/xen/arch/ia64/process.c
--- a/xen/arch/ia64/process.c 2005-06-10 14:03:42 -04:00
+++ b/xen/arch/ia64/process.c 2005-06-10 14:03:42 -04:00
@@ -130,6 +130,42 @@
return ((pteval & _PAGE_PPN_MASK) | (mpaddr & ~PAGE_MASK));
}
+unsigned long slow_reflect_count[0x80] = { 0 };
+unsigned long fast_reflect_count[0x80] = { 0 };
+
+#define inc_slow_reflect_count(vec) slow_reflect_count[vec>>8]++;
+
+void zero_reflect_counts(void)
+{
+ int i;
+ for (i=0; i<0x80; i++) slow_reflect_count[i] = 0;
+ for (i=0; i<0x80; i++) fast_reflect_count[i] = 0;
+}
+
+int dump_reflect_counts(char *buf)
+{
+ int i,j,cnt;
+ char *s = buf;
+
+ s += sprintf(s,"Slow reflections by vector:\n");
+ for (i = 0, j = 0; i < 0x80; i++) {
+ if (cnt = slow_reflect_count[i]) {
+ s += sprintf(s,"0x%02x00:%10d, ",i,cnt);
+ if ((j++ & 3) == 3) s += sprintf(s,"\n");
+ }
+ }
+ if (j & 3) s += sprintf(s,"\n");
+ s += sprintf(s,"Fast reflections by vector:\n");
+ for (i = 0, j = 0; i < 0x80; i++) {
+ if (cnt = fast_reflect_count[i]) {
+ s += sprintf(s,"0x%02x00:%10d, ",i,cnt);
+ if ((j++ & 3) == 3) s += sprintf(s,"\n");
+ }
+ }
+ if (j & 3) s += sprintf(s,"\n");
+ return s - buf;
+}
+
void reflect_interruption(unsigned long ifa, unsigned long isr, unsigned long
itiriim, struct pt_regs *regs, unsigned long vector)
{
unsigned long vcpu_get_ipsr_int_state(struct vcpu *,unsigned long);
@@ -165,6 +201,7 @@
regs->cr_ipsr = (regs->cr_ipsr & ~DELIVER_PSR_CLR) |
DELIVER_PSR_SET;
// NOTE: nested trap must NOT pass PSCB address
//regs->r31 = (unsigned long) &PSCB(v);
+ inc_slow_reflect_count(vector);
return;
}
@@ -195,6 +232,8 @@
PSCB(v,interrupt_delivery_enabled) = 0;
PSCB(v,interrupt_collection_enabled) = 0;
+
+ inc_slow_reflect_count(vector);
}
void foodpi(void) {}
@@ -748,7 +787,7 @@
if (running_on_sim) do_ssc(vcpu_get_gr(current,36), regs);
else do_ssc(vcpu_get_gr(current,36), regs);
}
- else if (iim == d->breakimm) {
+ else if (iim == d->arch.breakimm) {
if (ia64_hypercall(regs))
vcpu_increment_iip(current);
}
diff -Nru a/xen/arch/ia64/regionreg.c b/xen/arch/ia64/regionreg.c
--- a/xen/arch/ia64/regionreg.c 2005-06-10 14:03:42 -04:00
+++ b/xen/arch/ia64/regionreg.c 2005-06-10 14:03:42 -04:00
@@ -63,9 +63,14 @@
// returns -1 if none available
-unsigned long allocate_metaphysical_rid(void)
+unsigned long allocate_metaphysical_rr0(void)
{
- unsigned long rid = allocate_reserved_rid();
+ ia64_rr rrv;
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